Market core
UART Control Lite
Reusable open control-plane ingress core for lightweight board bring-up commands, runtime configuration, and client command bridging.
Compatibility
Design metadata available
- Can be reviewed for Build graph integration
- AccelFury af compatibility review needed
- No automatic promotion into Build without review.
Interfaces
Connection hints
- control: uart, registers, telemetry
Clock domains: clk_i (data)
Usage contract
Free listing
Listed under Apache-2.0. Check the license and source revision before reuse.
Read the license guideVariants
Resource estimates
- default: Resource estimate unavailable.
Synthesis and place-and-route results are needed to characterize resource use.
Review gate
What is missing
- Estimated resources are not synthesis evidence.
- No timing, CDC or RDC signoff is implied.
- AccelFury af compatibility must be reviewed before promotion.
Sources
fpga-skillls IP catalog: UART Control Lite
library/ip/catalog/uart-control-lite-frameworkseed-38d96e81.jsonRevision: c6306d0cb1c024ca6a6674ea924ddcaea703898f
Manual source check required.
fpga-skillls payload: uart_control_lite.sv
library/ip/sources/public/framework-seed/uart-control-lite/rtl/uart_control_lite.svRevision: 80212d624101d273d01b9decf90824953f5ad7ce8f55c7ebd76f1537e01e2bb9
Manual source check required.
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